The present invention relates to a frequency synthesizer for an apparatus, such as radio pagers, having a battery savings feature.
In a frequency synthesizer employed in conventional radio pagers in which battery saving is effected, two frequency dividers are provided, one for dividing the frequency of an output of a voltage-controlled oscillator and the other for dividing the frequency of a reference frequency pulse from a reference frequency oscillator. The phase difference between the two pulses is detected by a phase comparator and supplied via a loop filter to the control input of the VCO. When the output of the variable frequency divider is phase-advanced with respect to the output of the other frequency divider, the phase comparator supplies a ground potential to the VCO to decrease its frequency; otherwise, a high voltage is applied to the VCO to increase its frequency. The frequency control in this manner will be repeated several times until the phase comparator produces no output. If the frequency synthesizer of this type is used in applications where its power supply is interrupted for power savings purposes during idle periods, it would take long to phase-lock the synthesizer each time its power circuit is reactivated. While this problem could be solved with the use of a capacitor for holding a voltage developed across the loop filter during an idle period and using it as a frequency control voltage at the start of the next active period, a prolonged power cutoff would cause the VCO and the reference frequency oscillator to develop a small frequency difference therebetween which, in turn, results in a substantial amount of phase difference (of 180 degrees, at worst) between the outputs of the frequency dividers on starting the synthesizer during the next active period. Such a phase drift would result in a maximum frequency control voltage, causing the VCO to produce large frequency excursions.
In addition, it is advantageous from the power savings view point to employ frequency dividers of high dividing ratios and to deactivate them immediately following the stabilization of the VCO. However, the phase comparator of the prior art synthesizer is so sensitive that it produces an output even though a small frequency difference develops between the outputs of the frequency dividers. Therefore, the frequency dividers of the prior art synthesizer cannot be deactivated during the active state of the synthesizer for power savings purposes.